Home > TERATEC FORUM > Workshop 3

TERATEC 2025 Forum
The European meeting for Experts in High Power Digital
Simulation . HPC/HPDA . Artificial Intelligence . Quantum Computing

Wednesday May 21
Workshop 03 - 4:15 pm to 6:15 pm

Fault-tolerant Quantum Computing: challenges and outlook
Chaired by Emmanuelle Vergnaud, Operations Manager, Teratec
et Jean-Philippe Nominé, HPC Strategic Collaborations Manager, CEA

This workshop, presented the work of the FTQC Working Group of the French Academy of Technologies on the feasibility and impact of fault-tolerant quantum computing, provided an opportunity to review the current state of the art, highlighting recent advances and the associated technical challenges.

We explored the state of the art in error correction, and address the technological and strategic approaches to scaling up FTQC, discussing the challenges and conditions necessary for its industrial deployment.

Introduction
Catherine Lambert, President of CERFACS and head of the FTQC Group of the Académie des Technologies, Member of the Académie des Technologies

Biography >>>>
Download the presentation >>>>

Key points of the Académie des Technologies report
Olivier Ezratty, Author and Quantum Engineer, Quantum Energy Initiative

Abstract & Biography >>>>
Download the presentation >>>>

Panel
Animated by Jean-Philippe Nominé, HPC Strategic Collaborations Manager, CEA
With the participation of:
- Anthony Leverrier, Research, Inria
- Frédéric Magniez, Directeur de recherche, Laboratoire IRIF CNRS
- Boris Bourdoncle, secrétaire général du rapport, Quandela
- Mamdouh Abbara, , Client Engagement Specialist, Alice & Bob
- Cyril Allouche, Head of Quantum Computing R&D, Head of Disruptive Innovation, Eviden

Biographies >>>>
Download the presentation >>>>

Conclusion & outlook
Loïc le Loarer, coordinator of the National Quantum Strategy, SGPI, Prime Minister's Office

Biography >>>>

For any other information regarding the workshops, please contact:

Jean-Pascal JEGU
Tel : +33 (0)9 70 65 02 10
jean-pascal.jegu@teratec.fr
Campus TERATEC
2, rue de la Piquetterie
91680 BRUYERES-LE-CHATEL
France

 

 

© Ter@tec - All rights reserved - Lawful mention