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TERATEC 2025 Forum
The European meeting for Experts in High Power Digital
Simulation . HPC/HPDA . Artificial Intelligence . Quantum Computing

Thursday May 22
Workshop 06 - 9:30 am to 11:30 am

Components and increasing performances of HPC systems: effervescence, divergence, convergence
Chaired by Marc Duranton, Research Fellow, CEA
and Denis Dutoit, Program Manager,Advanced Computing, CEA


© CEA

High-performance computing sees its future increasingly linked to, or influenced by, AI and new technologies. Powerful computing and digital processing, in the broad sense, actually require computing components, memory, interconnection and other interfaces integrated into systems-on-a-chip (SoC) using the latest developments such as chiplet and interposers, Wafer Scale Integration, photonics, etc.

This workshop examined and illustrated trends in this field, and what we're seeing emerging in addition to or alongside the GPU tidal wave.

The current trends for the HPC elements
Marc Duranton, Research Fellow, CEA et Denis Dutoit, Program Manager,Advanced Computing, CEA

Abstract & Biography >>>>
Download the presentation >>>>

AMD Multi-die Architecture for Exa-Class HPC and AI Systems
Jose Noudohouenou, Senior Staff Software Engineer, AMD

Abstract & Biography >>>>
Download the presentation >>>>

Leveraging Wafer-Scale Innovation for Next-Gen AI Acceleration: The Cerebras Revolution
Alexander Mikoyan, Technology Sales Leadership & Transformation, Cerebras

Abstract & Biography >>>>
Download the presentation >>>>

Silicon photonics for AI  - the good, the bad and the ugly
Thomas Van Vaerenbergh, Photonics Research Engineer, HPE labs

Abstract & Biography >>>>
Download the presentation >>>>

Performance through specialization – or not?
Axel Nackaerts, Scientific Director, imec

Abstract & Biography >>>>
Download the presentation >>>>

Round table with the speakers and discussions with the audience.

For any other information regarding the workshops, please contact :

Jean-Pascal JEGU
Tel : +33 (0)9 70 65 02 10
jean-pascal.jegu@teratec.fr
Campus TERATEC
2, rue de la Piquetterie
91680 BRUYERES-LE-CHATEL
France


 

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