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Ter@Tec
At the start of this New Year, I wish you all the best for 2012 and hope that it is a successful year for you and your companies.

After 2011, the year we began the construction of our Campus, 2012 will be first and foremost for us its opening year. This opening will symbolize reaching one of our main objectives, which is to be able to bring together on one site the elements of an ecosystem that is entirely dedicated to high performance computing: public and private research laboratories, small and large technological companies, and large high performance computing equipment, with training and conference space. This group is unique in the world, and will allow us to gather together activities from all of the steps in HPC's value chain, system, software and service components.

The development of high performance computing and the diversification of its uses represent a considerable pool of activities and innovation that are very supportive of the creation and growth of small and medium enterprises. These companies will find an environment on the Campus that is favorable to their actions in the context of the Incubator and Business hotel of the Essonne Chamber of Trade and Industry, and we will take specific actions to help them in their development.

In parallel, many actions will be carried out to increase the international visibility of TERATEC, with a priority placed on its presence at the European level. The announcement in November 2011 of the implementation of a European Technology Platform will materialize in 2012, and we will continue to be very active in European projects.

Moreover, the starting of the SystemX Institute of Technological Research, as we are hoping for in 2012, will be the occasion to provide a renewed structure and scope to our R&D activities, within the context of our cooperation with the Systematic competitiveness cluster.

Our association's major annual meeting, the TERATEC Forum, will be taking place on June 27 and 28, 2012 at the Ecole Polytechnique and will be the occasion to discover new perspectives in a number of fields.
I look forward to seeing you soon on our Campus, and on June 27 and 28 for our 2012 Forum.

Gérard ROUCAIROL
Président, TERATEC

13,000 square meters of offices in the first European Technopole dedicated to Simulation and High Performance Computing
The purpose of the TERATEC Campus is to give professionals from the field of numerical simulation and high performance computing a dynamic and welcoming environment at the crossroads of innovation, based on three major areas: system architecture and performance, software development and services provision.

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A customized offer thanks to an incubator and business hotel
At the heart of the TERATEC Campus, the Chamber of Trade and Industry of the region of Essonne accommodates you in a space of over 1,500 square meters, providing small, fitted office areas ranging from 15 to 280 square meters in size, including quality services and customized support to meet your development needs, whether you are a small or a large company.

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To learn more about accommodation of companies on the TERATEC campus, business incubator and business hotel,  please contact the Essonne Chamber of Trade and Industry, Marie-Noëlle DECARREAU - +33 (0) 1 60 87 89 10.

Bringing together the best international experts in HPC, the TERATEC Forum is a major event in France and in Europe. The seventh edition will be taking place on June 27 and 28, 2012, in the prestigious campus of the Ecole Polytechnique.

On June 27, the common subject of plenary sessions will be the diversity of uses of supercomputing, with the participation of public figures from the political, economic and academic worlds, leading international industrial users and leading suppliers of these technologies.

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On June 28, Technical workshops will bring together the best experts in complex engineering systems, high performance systems, scientific visualization, data deluge, HPC and embedded systems, and will review the technological challenges presented by Exascale.

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During these two days, there will be an exhibition of around sixty booths of the main players in high performance computing and simulation. Software manufacturers and producers, integrators and distributors, service providers, academic and laboratory researchers, public and private sector developers, etc. will present their latest HPC innovations.

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If you would like to take part in these days, submit a paper for the workshops, book a booth in the exhibition or sponsor the TERATEC 2012 Forum, please contact Jean-Pascal Jegu as soon as possible - +33(0)1 69 26 61 76

Gather issues for SMEs to allow a fair representation in TERATEC and be attentive to the issues that SMEs would like to receive within the association, are the main objectives of the SME Committee.

Among the first actions of the SME Committee , it should be noted the development of relations with OSEO, the consolidation of links between the SMEs of TERATEC and SYSTEMATIC and reflections on the development of service platforms (cloud computing, mechanical engineering, multimedia , health ...). The Committee is also working on the recruitment of new SMEs and contributes to the development of the TERATEC Campus.

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The Scientific and Technical Committee of TERATEC advises the association on the broad scientific and technological guidelines in the HPC field and helps validate the interest of national and international initiatives, and the partnerships in which TERATEC could participate.

In 2011, the Committee examined all the actions taken by TERATEC and the considered projects. It emphasized in particular the major importance of high performance computing training and of the related tools, and recommended strengthening the considered actions, notably through the implementation of a true international dimension, with priority given to collaborative European actions.

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The lab is focussing on the optimization the performance of “real applications”, on the scaling out to very high number of cores and on to developing a methodology framework for performance evaluation.  The main guideline is “co-design for efficient exascale computing”. Efficiency can take different incarnations depending on the problem:  being able to increase the size of the system to address problems of high relevance for science and engineering, improving precision over very long integration times, moving to much higher resolution, reducing time to solution or minimising the power envelop for a defined task. This is why, for each case, ECR works directly with the scientist to define metrics for quality and performance, an essential step for steering and validating the optimisation work.

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With a success rate of 82% in the first year and 83% in the second year of the first intake of students, the master's degree is showing good results. Moreover, in accordance with the research and professional aim of the master's degree, half of the second year graduates have entered into research, and the other half are specialized managers in HPC. The 2011-2012 class is made up of 21 students in the first year, and 21 in the second year.

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AGREGATION - Contrôle commande sûr pour les moyens d’essais. The chain of aerospace subcontracting is reorganized around the themajor actors who take the responsibility to provide systems incorporating multiple subcontractors to aircraft manufacturers. One such organization is conceived in a fashion design based on a complete model of aircraft components. If the major manufacturers have fully integrated the benefits to be derived from the model-based approach, the chain of subcontracting progressing too slowly in that direction. For several reasons: lack of financial resources, lack of trained staff, work habits, leaving the R & D at the client. The project AGREGATION positions on this issue to provide tools to demonstrate the good fit between the products developed and modeling.  

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CHAPI - Calcul embarqué Hautes performances pour les Applications Industrielles, petites & moyennes séries. Le projet CHAPI adresse la problématique du calcul embarqué hautes performances ; Il vise à accompagner l’émergence d’une nouvelle génération de circuits programmables hautes performances, massivement parallèles, pour les applications industrielles, petites et moyennes séries.  

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MIEL - MIxed ELement - 3D Mesher. The main goal of the MIEL project is to optimize the meshing activity prior to a numerical simulation by addressing two main challenges: technical (simulation requires robust, high quality and fast meshing technology) and strategic (since meshing is cost effective in human resources, it often takes place in low cost structures). MIEL will give powerful tools for meshing and modelisation in a pragmatic frame with a reasonnable ambition. These tools aim at being used by commercial software as well as open source environments

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SIMILAN - SIMulation & Implementation high performance fitted to digitaL signAl processing. Processors technologies have progressed for few years and the main evolution to use the maximum of transistors is to juxtapose calculation units. Thus, the simple-core processor is now replaced with many-core processors. However, to take advantage of the powerful calculator, the algorithms have to be developed in parallel form. Indeed, only parallelization experts are able to use parallelmachines and the technical experts on signal processing subjects cannot use parallelization easily

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Other projects : AIRCITY - COLLAVIZ - COOL-IT - CSDL - H4H - MANYCORELABS - OASIS - OMD2 - OPEN GPU - OPUS

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ALTRAN
ST MICROELECTRONICS

TERATEC's 13th Ordinary General Assembly
On January 12, 2012, the association's 13th Ordinary General Assembly took place in CEA's Very Large Computing Center's Conference Space (Bruyères-le Châtel).

Bull Joseh Fourier 2012 Prize
Join the Bull-Joseph Fourier Prize to reward a researcher or research team for its work in the field of application parallelization of numerical simulation. Deadline for applications: 27 April 2012

Call for Paper : GPU Design Patterns
The OpenGPU project invites original and innovative performance-oriented contributions from all areas of High Performance Computing (HPC) targeting hybrid GPU / CPU architectures, including hardware architectures, software tools or data structures.

Parallel Computing Mag
New free bimonthly magazine dedicated to all areas of high performance computing, software and hardware.

Cloud et HPC
January 25 & 26, 2012 - Institut Henri Poincaré - 11 Rue Pierre et Marie Curie, 75005 Paris

Les données dans le monde réel
February 2, 2012 - Société de Calcul Mathématique - 111 Faubourg Saint Honoré, 75008 Paris

NI Days
February 7, 2012 - CNIT Paris La Défense

Prace Winter School 2012
February 6-10, 2012, Bologna, Italy

Techinnov 2012
February 16, 2012 - Paris - Orly       

Scilab : Open Source pour la simulation numérique
February 14, 2012 - Novell France – Tour Franklin Paris La Défense

STAR Global Conference 2012
March 19 & 21, 2012 - Amsterdam, Netherlands

Conférence NAFEMS 2012
June 5 & 6, 2012 - Paris

Forum TERATEC 2012
June 27 & 28, 2012 Ecole Polytechnique, Palaiseau

EngOpt 2012 - 3rd International Conference on Engineering Optimization
July 1 & 5, 2012 – Rio de Janeiro, Brazil

 

 


SUMMARY

Editorial

TERATEC Campus

TERATEC Forum 2012

Master of Science in Informatics, HPC and Simulation

SME Committee

Scientific and Technical Committee

Scientific and Technical Committee

Exascale Computing Research Lab

Master of Science in Informatics, HPC & Simulation

Collaborative R&D projects

Members

News & Next events



TERATEC Forum 2012


Sign up today
Participation to conferences and workshops is free, subject to seats available

EUROPEAN TECHNOPOLE DEDICATED TO HIGH-PERFORMANCE SIMULATION AND COMPUTING

High-performance numerical simulation and design have become essential to industry and research. More than 80 stakeholders in the field - providers, users and researchers - have joined forces within the TERATEC association to:

Contribute to the development of a wide variety of uses for high-performance computing while making them widely accessible

Accelerate the design and implementation of new computer systems with increasingly powerful hardware and software

Advance the development of new simulation methods and related tools

Encourage skill building and creation of highly qualified jobs in the field.

TERATEC MEMBERS

Industrial Users
Airbus
Air Liquide
ArcelorMittal
Bertin technologie
Dassault Aviation
EADS
Electricité de France
Faurecia
L'Oreal
Medef Ile de France
National Instruments
Schneider Electric
Snecma groupe Safran
Total

IT Companies
ActiveEon
Alcatel lucent
Alineos
Allinea Software
Altair Engineering France
Altran
Alyotech
AMD
Ansys
Aria Technologies
Bull
Caps entreprise
Carri Systems
CD Adapco
Cenaero
ClusterVision
Communication et Systèmes
DataDirect Networks
Dell
Distène
Engin Soft  
ESI Group
Eurodécision
Fujitsu
HP France
HPC Project
Intel
Kalray
MathWorks
Medysys
Mentor Graphics
Microsoft France
MSC Software
Nice Software
Noesis Solutions
Numtech Groupe SETH
NVIDIA
Open Cascade
Oxalya
Panasas
Samtech
Scilab Enterprises
Serviware
SGI
STMicroelectronics
SysFera
Transtec

Universities and Research Laboratories
Andra
CEA
CERFACS
CNRS
Digiteo
Centre scientifique et technique du bâtiment
Ecole Centrale de Paris
Ecole Nationale Supérieure des Mines de Paris
Ecole Polytechnique
Ecole Supérieure d'Electricité
Ecole Normale Supérieure de Cachan
Ecole Supérieure d'Ingénieur Léonard de Vinci
GENCI
Institut Français du Pétrole
Institut Telecom
INRIA
Université de Versailles St Quentin en Yvelines

Local authorities
Chambre de Commerce et d'Industrie de l'Essonne
Conseil Général de l'Essonne
Communauté de Communes de l’Arpajonnais
Ville de Bruyères le Châtel
Ville d’Ollainville

 

More informations about TERATEC

Please Contact :
Jean-Pascal JEGU
Domaine du Grand Rué
91680 BRUYERES-LE-CHATEL
France
Tel. : +33(0)1.69.26.61.76
infos@teratec.fr

www.teratec.eu

 

 

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