Accueil > FORUM TERATEC > Programme > Atelier 3

Forum TERATEC 2013
Atelier 1 - Mercredi 26 juin de 9h00 à 13h00
Systèmes Complexes, mécatroniques et embarqués : Progrès et Verrous technologiques

System Architecture for Safety-Critical High-Performance Systems: Current Approaches and Future Perspectives

Director of the Computer and System Engineering Department at ENSTA ParisTech

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Abstract : Safety-Critical Embedded Systems have evolved from simple automatisms to complex systems integrating the interaction of numerous interconnected subsystems.

The resulting architectures mix large amount of software running on distributed hardware. Consequently, timing requirements become more difficult to assess as control algorithms consume larger amount of processing power.

While critical systems must be certified safe and reliable, the constraints of predictability remain unchanged. Processes for modeling, verifying and validating these systems consequently increase in cost and called for innovative solutions. Therefore, various approaches have been developed in the last decade as well as prototyping platforms for testing global behaviors.

The talk will present an overview of the state of the art and propose some new approaches that are currently explored in various domains of application.

Biography : Bruno Monsuez, graduated in 1989 from Ecole Polytechnique , received a PhD in Computer Science from the Ecole Polytechnique in 1994. He is now Director of the Computer and System Engineering Department at ENSTA ParisTech. His current research interests are focused on developing and enhancing hierarchical compositional mathematical models that can be used to represent hardware and software components of complex embedded systems as well as formal verification techniques that allow a co-jointly verification the functional and non-functional properties of the software as well as the hardware on which the software is expected to run. He served on PCs and as PC chair for numerous international workshops and conferences. He is the steering committee chair of Int. Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS).

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